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The location of the contacts is illustrated in Figure 3.5. The contacts are almost always found on the front face of the card, which is the side of the card with the primary graphic and opposite the side with any magnetic stripe. However, the ISO 7816-2 standard does not mandate that the contacts appear on the front; the contacts can appear on the back of the card as long as care is taken to make sure the contacts do not intersect the magnetic stripe area.
Figure 3.5. Location, size, and shape of contacts.
Many of the earliest smart cards adhered to a different standard for contact locations that positioned the contacts toward the upper-left portion of the front face of the card. The standard on which this positioning was based became obsolete in 1990. Cards designed according to this standard were deployed primarily in Europe to support credit and debit applications.
ISO 7816-3 begins to delve into the specification of the intelligent aspects of the smart card. This standard describes the relationship between the smart card and the reader as one of slave (the smart card) and master (the reader). Communications are established by the reader signaling to the smart card through the contacts noted previously and are continued by the smart card responding accordingly. Communication between the card and reader proceed according to various state transitions illustrated in Figure 3.6. The communication channel is single-threaded; once the reader sends a command to the smart card, it blocks until a response is received.
Figure 3.6. Reader and smart card general state diagrams.
When a card is inserted into a reader, no power is applied to any of the contacts. The chip on the card could be seriously damaged by applying power to the wrong contacts, and this situation could easily occur if a card were inserted across powered contact points. The contacts remain unpowered until an edge detector determines that the card is properly aligned with the contact points to within some acceptable (for the reader) mechanical tolerance.
Note:
Security mechanisms on many chips could be triggered if the cards were inserted across powered contact points, resulting in the possible disabling of the chip.
When the reader detects that the card is properly inserted, power is applied to the card. First, the contacts are brought to a coherent idle state, as shown in Table 3.4. A reset signal is then sent to the card via the RST contact line. The idle state is characterized as being when the power (VCC) contact is brought up to a normal, stable operating voltage of 5 v. An initial power setting of 5 v is always applied first, even though some microprocessor chips being introduced operate at 3 v when in an I/O state. The I/O contact is set to a reception mode on the reader side and a stable clock (CLK) is applied. The reset line is in a low state. It must remain in a low state for at least 40,000 CLK cycles before a valid reset sequence can be started by the reader, raising the reset line to a high state.
Contact | State |
---|---|
VCC | Powered and stable |
VPP | Stable at idle state |
RST | Statelow |
CLK | Suitable and stable clock signal applied |
I/O | Reception mode in interface device |
As illustrated in Figure 3.7, powering up a smart card occurs according to a well-defined sequence. Once power has been satisfactorily applied to the card, the RST line is raised to a high state that signals to the card to begin its initialization sequence. The specific initialization operations can vary from card to card, but the sequence should result in the sending of an answer to reset (ATR) from the card back to the reader. In general, the first byte of the ATR must be received by the reader within 40,000 clock cycles. Following that, each successive byte of the ATR must be received by the reader at a rate of at least 1 byte per second.
Figure 3.7. The reader reset sequence.
Data transfer between the reader and the card occurs through the concerted action of two of the contact lines: CLK and I/O. The I/O line conveys a single bit of information per unit of time as defined by the CLK depending on its voltage relative to GND. A 1 bit can be conveyed either through a +5 v value or through a 0 v value. The actual convention used is determined by the card and is conveyed to the reader through the initial character of the ATR, which is referenced as TS. To transfer 1 byte of information, 10 bits are actually moved across the I/O line; the first is always a start bit and the last is always a parity bit used to convey even parity. Considering that the I/O line can be (in one bit period) either in a high (H) state or a low (L) state, the TS character of the form HLHHLLLLLLH signals that the card wants to use the inverse convention, meaning that H corresponds to a 0 and L corresponds to a 1. A TS character of the form HLHHLHHHLLH signals that the card wants to use the direct convention, meaning that H corresponds to a 1 and L corresponds to a 0.
The direct convention and the inverse convention also control the bit ordering with each byte transferred between the card and the reader. In the direct convention, the first bit following the start bit is the low-order bit of the byte. Successively higher-order bits follow in sequence. In the inverse convention, the first bit following the start bit is the high-order bit of the byte. Successively lower-order bits follow in sequence. Parity for each byte transferred should be even; this means that the total number of 1 bits in the byte, including the parity bit, must be an even number.
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