ANNEX



(to Recommendation G.812)



Characterization of slave clock phase stability





1.	The slave clock model is described by the following equation:



                                           t = t

	x(t) = ybias.t + D .t2 + epm(t) +        efm(t)dt                          2

                                           t = 0



where,



	x(t)	is the phase-time output relative to the reference input (dimensions 
of time)



	ybias	is a residual fractional frequency offset which can arise from 	
disruption events on the reference input (dimensionless)





	D	is the linear frequency drift component when the clock is in 
holdover condition (dimension 1/time)



	epm(t) is a white noise phase modulation (PM) component associated 
with

the short-term instability of the clock (dimension time)



	efm(t) is a white noise fractional frequency modulation (FM) component

associated with the disruption process of the reference 
(dimensionless)



	The clock model is best understood by considering the three categories of 
clock operation:



	-	ideal operation;



	-	stressed operation;



	-	holdover operation.



1.1	Ideal operation



	For short observation intervals outside the tracking bandwidth of the 
PLL, the stability of the output timing signal is determined by the short 
term stability of the local synchronizer time base. In the absence of refer-
ence disruptions, the stability of the output timing signal behaves asymp-
totically as a white noise PM process as the observation period is 
increased to be within the tracking bandwidth of the PLL. The output of 
the clock can be viewed as a superposition of the high frequency noise of 
the local oscillator riding on the low frequency portion of the input refer-
ence signal. In phase locked operation the high frequency noise must be 
bounded, and is uncorrelated (white) for large observation periods rela-
tive to the bandwidth of the phase locked loop.



	Under ideal conditions, the only non-zero parameter of the model is the 
white noise PM component.



1.2	Stressed operation



	In the presence of interruptions, the stability of the output timing signal 
behaves as a white noise FM process as the observation period is 
increased to be within the tracking bandwidth of the PLL. The presence 
of white noise FM can be justified based on the simple fact that in gen-
eral, network clocks extract time interval, rather than absolute time from 
the time reference.  An interruption is by nature a short period during 
which the reference time interval is not available. When reference is 
restored there is some ambiguity regarding the actual time difference 
between the local clock and the reference. Depending on the sophistica-
tion of the clock phase build-out there can be various levels of residual 
phase error which occur for each interruption. There is a random compo-
nent which is independent from one interruption event to the next which 
results in a random walk in phase, i.e. a white noise FM noise source.



	In addition to the white noise FM component, interruption events can 
actually result in a frequency offset between the clock and its reference. 
This frequency offset (ybias) results from a bias in the phase build-out 
when reference is restored. This is a critical point. The implications of 
this effect are that in actual network environments there is some accumu-
lation of frequency offset through a chain of clocks. Thus, clocks con-
trolled by the same primary reference clock are actually operating 
plesiochronously to some degree.



	To summarize, under stress conditions the non-zero parameters of the 
clock model are the white noise FM component (efm) and the frequency 
offset component (ybias). The stressed category of operation reflects a 
realistic characterization of what "normal" operation of a clock is.



1.3	Holdover operation



	In holdover, the key components of the clock model are the frequency 
drift (D) and the initial frequency offset (ybias). The drift term accounts 
for the significant ageing associated with quartz oscillators. The initial 
frequency offset is associated with the intrinsic setability of the local 
oscillator frequency.



2.	Relationship of slave clock model to TIE performance



	It is useful to consider the relationship between the clock model and the 
Time Interval Error (TIE) that would be expected. It is proposed that the 
two sample Allan variance be used to describe the stochastic portion of 
the clock model. The following equations apply for the three categories 
of operation:



Ideal

         ––––––––––––––

sTIE = _ 3 s2, (t = t) .t



Stressed

         –––––––––––––––––––––

sTIE = _ s2bias + s2, (t = t) .t



Holdover

                   ––––––––––––––––––––– 

sTIE =   D .t2 + _ s2bias + s2, (t = t) .t

         2



where,



	sTIE	is the standard deviation of the relative time interval error ofthe 
clock output compared to the reference over the observation 
time t.



	s,(t)	is the two sample standard deviation describing the random fre-
quency fluctuation of the clock, and



	sbias	describes the two sample standard deviation of the frequency bias.



3.	Guidelines concerning the measurement of jitter and wander



	Verification of compliance with jitter and wander specifications requires 
standardized measurement methodologies to eliminate ambiguities in the 
measurements and in the interpretation and comparison of measurement 
results. Guidance concerning the measurement of jitter and wander is 
contained in SupplementNo. 35.