- - AP IX-142-E 2. Recommendation G.703 Note 1 - The characteristics of interfaces at non-hierarchical bit rates, except n x 64 kbit/s interfaces conveyed by 1544 kbit/s or 2048 kbit/s interfaces, are specified in the respective equipment Recommendations. Note 2 - The jitter specifications contained in the following 6, 7, 8 and 9 are intended to be imposed at international interconnection points. Note 3 - The interfaces described in 2 to 9 of this Recommendation correspond to the ports T (output port) and T' (input port) as recommended for interconnection in CCIR Recommendation AC/9 with reference to Report AH/9 of CCIR Study Group 9. (This Report defines the points T and T'.) Note 4 - For signals with bit rates of n x 64 kbit/s (n = 2 to 31) which are routed through multiplexing equipment specified for the 2048 kbit/s hierarchy, the interface shall have the same electrical physical characteristics as those for the 2048 kbit/s interface specified in section 6/G.703. For signals with bit rates of n x 64 kbit/s (n = 2 to 23) which are routed through multiplexing equipment specified for the 1544 kbit/s hierarchy, the interface shall have the same electrical physical characteristics as those for the 1544 kbit/s interface specified in section 2/G.703. 1.1.2 In both directions of transmission, three signals can be carried across the interface: - 64 kbit/s information signal; - 64 kHz timing signal; - 8 kHz timing signal. Note 1 - The 64 kbit/s information signal and the 64 kHz timing signal are mandatory. However, although an 8 kHz timing must be generated by the controlling equipment (e.g., PCM multiplex or time slot access equipment), it should not be mandatory for the subordinate equipment on the other side of the interface to either utilize the 8 kHz timing signal from the controlling equipment or to supply an 8 kHz timing signal. Note 2 - The detection of an upstream fault can be transmitted across the 64 kbit/s interface by transmitting an Alarm Indication Signal towards the subordinate equipment. 1.1.3 The interface should be bit sequence independent at 64 kbit/s. 1.1.4.2 Centralized clock interface The term centralized clock is used to describe an interface wherein for both directions of transmission of the information signal, the associated timing signals are supplied from a centralized clock, which may be derived for example from certain incoming line signals (see Figure 2/G.703). 1.1.4.3 Contradirectional interface The term contradirectional is used to describe an interface across which the timing signals associated with both directions of transmission are directed towards the subordinate equipment (See Figure 3/G.703). 1.2.1.1.6 Overvoltage protection requirement: See Annex B. The return loss at the input ports should have the following minimum values: UA 3 Frequency Range 3 Return Loss 3 A' 3 4 kHz to 13 kHz 3 12 dB 3 3 13 kHz to 256 kHz 3 18 dB 3 3 256 kHz to 384 kHz 3 14 dB 3 AAU To provide nominal immunity against interference, input ports are required to meet the following requirements: A nominal aggregate signal, encoded as a 64 kbit/s co-directional signal, and having a pulse shape as defined in the pulse mask shall have added to it interfering signal with the same pulse shape as the wanted signal. The interfering signal should have a bit rate within the limits specified in this Recommendation but should not be synchronous with the wanted signal. The interfering signal shall be combined with the wanted signal in a combining network, with an overall zero loss in the signal path and with the nominal impedance 120 ohms to give a signal to interference ratio of 20 dB. The binary content of the interfering signal should comply with Recommendation 0.152 (211-1 bit period). No errors shall result when the combined signal, attenuated by up to the maximum specified interconnecting cable loss, is applied to the input port. Note - If the symmetrical pair is screened, the screen shall be connected to the earth at the output port, and provision shall be made for connecting the screen of the symmetrical pair to earth, if required, at the input port. 1.2.3.1.6 Specifications at the input ports The digital signals presented at the input ports should be as defined above but modified by the characteristics of the interconnecting pairs. The attenuation of these pairs at a frequency of 32 kHz should be in the range 0 to 3 dB. This attenuation should take into account any losses incurred by the presence of a digital distribution frame between the equipments. The return loss at the input ports should have the following minimum values: UA 3 Frequency range 3 3 AA' Return loss 3 3 Data signal 3 Composite timing signal 3 3 A' 3 1.6 kHz to 3.2 kHz 3 3.2 kHz to 6.4 kHz 3 12 dB 3 3 3.2 kHz to 64 kHz 3 6.4 kHz to 128 kHz 3 18 dB 3 3 64 kHz to 96 kHz 3 128 kHz to 192 kHz 3 14 dB 3 AAAU To provide nominal immunity against interference, input ports are required to meet the following requirement: A nominal aggregate signal, encoded as a 64 kbit/s contra-directional signal, and having a pulse shape as defined in the pulse mask shall have added to it an interfering signal with the same pulse shape as the wanted signal. The interfering signal should have a bit rate within the limits specified in this Recommendation but should not be synchronous with the wanted signal. The interfering signal shall be combined with the wanted signal in a combining network with an overall zero loss in the signal path and with the nominal impedance 120 ohms to give a signal to interference ratio of 20 dB. The binary content of the interfering signal should comply with Recommendation 0.152 (211-1 bit period). No errors shall result when the combined signal, attenuated by up to the maximum specified interconnecting cable loss, is applied to the input port. Note 1 - The return loss specification for both the data signal and the composite timing signal input ports. Note 2 - If the symmetrical pairs are screened, the screens shall be connected to the earth at the output port, and provision shall be made for connecting the screens of the symmetrical pairs to earth, if required, at the input port. 1.2.3.1.7 Overvoltage protection requirement: See Annex B. 2 Interface at 1544 kbit/s 2.1 Interconnection of 1554 kbit/s signals for transmission purposes is accomplished at a digital distribution frame. 2.2 The signal shall have a bit rate of 1544 kbit/s 50 parts per million (ppm). 2.3 One symmetrical pair shall be used for each direction of transmission. 2.4 Test load impedance shall be 100 ohms, resistive. 2.5 An AMI (bipolar) code or B8ZS code shall be used. Connecting line systems require suitable signal content to guarantee adequate timing information. This can be accomplished either by use of B8ZS code, scrambling or by permitting not more than 15 spaces between successive marks and having an average mark density of at least 1 in 8. 2.6 The shape for an isolated pulse measured at the distribution frame shall fall within the mask in Figure 10/G.703 and meet the other requirements of Table 4/G.703. For pulse shapes within the mask, the peak undershoot should not exceed 40% of the peak pulse (mark). 2.7 The voltage within a time slot containing a zero (space) shall be no greater than either the value produced in that time slot by other pulses (marks) within the mask of Figure 10/G.703 or 0.1 of the peak pulse (mark) amplitude, whichever is greater in magnitude. a) The pulse mark for first order digital interface is shown in Figure 10/G.703. b) See 2.5 in the text. c) See Annex A. d) The signal level is the power level measured in a 3 kHz bandwidth at the point where the signal arrives at the distribution frame for an all 1s pattern transmitted. 3 Interface at 6312 kbit/s 3.1 Interconnection of 6312 kbit/s signals for transmission purposes is accomplished at a digital distribution frame. 3.2 The signal shall have a bit rate of 6312 kbit/s 30 ppm. 3.3 One symmetrical pair of characteristic impedance of 110 ohms, or one coaxial pair of characteristic impedance of 75 ohms shall be used for each direction of transmission. 3.4 Test load impedance shall be 110 ohms resistive or 75 ohms resistive as appropriate. 3.5 A pseudo-ternary code shall be used as indicated in Table 5/G.703. 3.6 The shape for an isolated pulse measured at the distribution frame shall fall within the mask either of Figure 11/G.703 or of Figure 12/G.703 and meet the other requirements of Table 5/G.703. 3.7 The voltage within a time slot containing a zero (space) shall be no greater than either the value produced in that time slot by other pulses (marks) within the mask of Figure 11/G.703, or 0.1 of the peak pulse (mark) amplitude, whichever is greater in magnitude. a) The pulse mask for second order digital interface is shown in Figures 11/G.103 and 12/G.703. b) See Annex A. c) See Annex A. 4 Interface at 32 064 kbit/s 4.1 Interconnection of 32 064 kbit/s for signals for transmission purposes is accomplished at a digital distribution frame. 4.2 The signal shall have a bit rate of 32 064 kbit/s 10 ppm. 4.3 One coaxial pair shall be used for each direction of transmission. 4.4 The test load impedance shall be 75 ohms 5% resistive and the test method shall be direct. 4.5 A scrambled AMI code shall be used. 4.6 The shape for an isolated pulse measured at the point where the signal arrives at the distribution frame shall fall within the mask in the Figure 13/G.703. 4.7 The voltage within a time slot containing a zero (space) shall be no greater than either the value produced in that time slot by other pulses (marks) within the mask of Figure 13/G.703 or 0.1 of the peak pulse (mark) amplitude, whichever is greater in magnitude. 4.8 For an all 1s pattern transmitted, the power measured in a 3 kHz bandwidth at the point where the signal arrives at the distribution frame shall be as follows: 16 032 kHz: +5 dBm to + 12dBm 32 064 kHz: at least 20 dB below the power at 16 032 kHz. 4.9 The connectors and coaxial cable pairs in the distribution frame shall be 75 ohms 5 %. 5 Interface at 44 736 kbit/s 5.1 Interconnection of 44 736 kbit/s signals for transmission purposes is accomplished at a digital distribution frame. 5.2 The signal shall have a bit rate of 44 736 kbit/s 20 ppm. The signal shall have a frame structure consistent with Recommendation G.752. Specifically, it shall contain the frame alignment bits F0, F11, F12 and the multi-frame alignment bits M1 to M7, as defined in Table 2/G.752. 5.3 One coaxial pair shall be used for each direction of transmission. 5.4 Test load impedance shall be 75 ohms 5% resistive, and the test method shall be direct. 5.5 The B3ZS code shall be used. This code is defined in Annex A. 5.6 The transmitted pulses have a nominal 50% duty cycle. The shape for an isolated pulse measured at the point where the signal arrives at the distribution frame shall fall within the mask in Figure 14/G703. 5.7 The voltage within a time slot containing a zero (space shall be no greater than either the value produced in that time slot by other pulses (marks) within the mask of Figure 14/G.703, or 0.05 of the peak pulse (mark) amplitude, whichever is greater in magnitude. 5.8 For an all 1s pattern transmitted, the power measured in a 3 kHz bandwidth at the point where the signal arrives at the distribution frame shall be as follows: 22 368 kHz: -1.8 to +5.7 dBm 44 736 kHz: at least 20 dB below the power at 22 368 kHz. 5.9 The digital distribution frame for 44 736 kbit/s signals shall have the characteristics specified in 5.9.1 and 5.9.2 below. 5.9.1 The loss between the points where the signal arrives and leaves at the distribution frame shall be as follows: 0.60 0.55 dB at 22 368 kHz (comprised of any combination of flat and shaped losses). 5.9.2 The connectors and coaxial pair cables in the distribution frame shall be 75 ohms 5%. Overvoltage protection requirement: See Annex B. 6.3.1 The digital signal presented at the input port shall be defined above but modified by the characteristic of the interconnecting pair. The attenuation of this pair shall be assumed to follow a f law and the loss at a frequency of 1 024 kHz shall be in the range of 0 to 6 dB. This attenuation should take into account any losses incurred by the presence of a digital distribution frame between the equipments. 6.3.2 For the jitter to be tolerated at the input port refer to 3 of Recommendation G.823. 6.3.3 The return loss at the input port should have the following minimum values. UA 3 Frequency range 3 Return loss 3 A' 3 51 kHz to 102 kHz 3 12 dB 3 3 102 kHz to 2 048 kHz 3 18 dB 3 3 2 048 kHz to 3 072 kHz 3 14 dB 3 AAU 6.3.4 To ensure adequate immunity against signal reflections that can arise at the interface due to impedance irregularities at digital distribution frames and at digital output ports, input ports are required to meet the following requirement: A nominal aggregate signal, encoded into HDB3 and having a pulse shape as defined in the pulse mask shall have added to it an interfering signal with the same pulse shape as the wanted signal. The interfering signal should have a bit rate within the limits specified in this Recommendation but should not be synchronous with the wanted signal. The interfering signal shall be combined with the wanted signal in a combining network, with an overall zero loss in the signal path and with the nominal impedance 75 (in the case of coaxial-pair interface) or 120 (in the case of symmetrical-pair interface), to give a signal to interference ratio of 18 dB. The binary content of the interfering signal should comply with Recommendation 0.151 (215-1 bit period). No errors shall result when the combined signal, attenuated by up to the maximum specified interconnecting cable loss, is applied to the input port. Note - A receiver implementation providing an adaptive rather than a fixed threshold is considered to be more robust against reflections and should therefore be preferred. 7.3.1 The digital signal presented at the input port shall be as defined above but modified by the characteristic of the interconnecting pair. The attenuation of this pair shall be assumed to follow a f law and the loss at a frequency of 4 224 kHz shall be in the range 0 to 6 dB. This attenuation should take into account any losses incurred by the presence of a digital distribution frame between the equipments. 7.3.2 For the jitter to be tolerated at the input port refer to 3 of Recommendation G.823. 7.3.3 The return loss at the input port should have the following minimum values. UA 3 Frequency range 3 Return loss 3 A' 3 211 kHz to 422 kHz 3 12 dB 3 3 422 kHz to 8 448 kHz 3 18 dB 3 3 8 448 kHz to 12 762 kHz 3 13 dB 3 AAU 7.3.4 To ensure adequate immunity against signal reflections that can arise at the interface due to impedance irregularities at digital distribution frames and at digital output ports, input ports are required to meet the following requirement: A nominal aggregate signal, encoded into HDB3 and having a pulse shape as defined in the pulse mask shall have added to it an interfering signal with the same pulse shape as the wanted signal. The interfering signal should have a bit rate within the limits specified in this Recommendation but should not be synchronous with the wanted signal. The interfering signal shall be combined with the wanted signal in a combining network, with an overall zero loss in the signal path and with the nominal impedance 75 to give a signal to interference ratio of 20 dB. The binary content of the interfering signal should comply with Recommendation 0.151 (215-1 bit period). No errors shall result when the combined signal, attenuated by up to the maximum specified interconnecting cable loss, is applied to the input port. 8 Interface at 34 368 kbit/s 8.1 General characteristics Bit rate: 34 368 kbit/s 20 ppm Code: HDB3 (a description of this code can be found in Annex A) Overvoltage protection requirement: See Annex B. 8.2 Specification at the output ports (see Table 8/G.703) 8.3 Specifications at the input ports 8.3.1 The digital signal presented at the input port shall be as defined above but modified by the characteristics of the interconnecting pair. The attenuation of this cable shall be assumed to follow approximately a f law and the loss at a frequency of 17 184 kHz shall be in the range 0 to 12 dB. 8.3.2 For the jitter to be tolerated at the input port refer to 3 of Recommendation G.823. 8.3.3 The return loss at the input port should have the following minimum values. UA 3 Frequency range 3 Return loss 3 A' 3 860 kHz to 1 720 kHz 3 12 dB 3 3 1 720 kHz to 34 368 kHz 3 18 dB 3 3 34 368 kHz to 51 550 kHz 3 14 dB 3 AAU 8.3.4 To ensure adequate immunity against signal reflections that can arise at the interface due to impedance irregularities at digital distribution frames and at digital output ports, input ports are required to meet the following requirement: A nominal aggregate signal, encoded into HDB3 and having a pulse shape as defined in the pulse mask shall have added to it an interfering signal with the same pulse shape as the wanted signal. The interfering signal should have a bit rate within limits specified in this Recommendation but should not be synchronous with the wanted signal. The interfering signal shall be combined with the wanted signal in a combining network, with an overall zero loss in the signal path and with the nominal impedance 75 to give a signal to interference ratio of 20 dB. The binary content of the interfering signal should comply with Recommendation 0.151 (223-1 bit period). No errors shall result when the combined signal, attenuated by up to the maximum specified interconnecting cable loss, is applied to the input port. 8.4 Earthing of outer conductor or screen The outer conductor of the coaxial pair shall be connected to the earth at the output port, and provision shall be made for connecting this conductor to earth, if required, at the input port. 9 Interface at 139 264 kbit/s 9.1 General characteristics Bit rate: 139 264 kbit/s 15 ppm. Code: coded mark inversion (CMI). Overvoltage protection requirement: See Annex B. 9.2 Specifications at the output ports (see Table 9/G.703 and Figures 19 and 20/G.703) Note 1 - A method based on the measurement of the levels of the fundamental frequency component, the second (and possibly the third) harmonic of a signal corresponding to binary all 0s and binary all 1s, is considered to be a perfectly adequate method of checking that the requirements of Table 9/G.703 have been met. The relevant values are under study. 9.3 Specifications at the input ports The digital signal presented at the input port should conform to Table 9/G.703 and Figures 19 and 20/G.703 modified by the characteristics of the interconnecting coaxial pair. The attenuation of the coaxial pair should be assumed to follow an approximate f law and to have a maximum insertion loss of 12 dB at a frequency of 70 MHz. For the jitter to be tolerated at the input port refer to 3 of Recommendation G.823. The return loss characteristics should be the same as that specified for the output port. Notes to Figure 19/G.703 Note 1 - V = 1.0 volt. Note 2 - For all measurements using these masks, the signal should be AC coupled, using a capacitor of not less than 0.01 uF, to the input of the oscilloscope used for measurements. The nominal zero level for both masks should be aligned with the oscilloscope trace with no input signal. With the signal then applied, the vertical position of the trace can be adjusted with the objective of meeting the limits of the masks. Any such adjustment should be the same for both masks and should not exceed +0.05 V. This may be checked by removing the input signal again and verifying that the trace lies within +0.05 V of the nominal zero level of the masks. Note 3 - Each pulse in a coded pulse sequence should meet the limits of the relevant mask, irrespective of the state of the preceding and succeeding pulses. For actual verification, if a 139 264 kHz timing signal associated with the source of the interface signal is available, its use as a timing reference for an oscilloscope is preferred. Otherwise, compliance with the relevant mask may be tested by means of all-0s and all-1s signals, respectively. (In practice, the signal may contain frame alignment bits per G.751.) Note 4 - The maximum "steady state" amplitude should not exceed the 0.55 V limit. Overshoots and other transients are permitted to fall into the dotted area, bounded by the amplitude levels 0.55 V and 0.6 V, provided that they do not exceed the steady state level by more than 0.05 V. The possibility of relaxing the amount by which the overshoot may exceed the steady state level is under study. Note 5 - For the purpose of these masks, the rise time and decay time should be measured between -0.4 V and 0.4 V, and should not exceed 2 ns. FIGURE 20/G.703 Mask of a pulse corresponding to a binary 1 Notes to Figure 20/G.703 Note 1 - V = 1.0 volt. Note 2 - For all measurements using these masks, the signal should be AC coupled, using a capacitor of not less than 0.01 uF, to the input of the oscilloscope used for measurements. The nominal zero level for both masks should be aligned with the oscilloscope trace with no input signal. With the signal then applied, the vertical position of the trace can be adjusted with the objective of meeting the limits of the masks. Any such adjustment should be the same for both masks and should not exceed to +0.05 V. This may be checked by removing the input signal again and verifying that the trace lies within +0.05 V of the nominal zero level of the masks. Note 3 - Each pulse in a coded pulse sequence should meet the limits of the relevant mask, irrespective of the state of the preceding and succeeding pulses. For actual verification, if a 139 264 kHz timing signal associated with the source of the interface signal is available, its use as a timing reference for an oscilloscope is preferred. Otherwise, compliance with the relevant mask may be tested by means of all-0s and all-1s signals, respectively. (In practice, the signal may contain frame alignment bits per G.751.) Note 4 - The maximum "steady state" amplitude should not exceed the 0.55 V limit. Overshoots and other transients are permitted to fall into the dotted area, bounded by the amplitude levels 0.55 V and 0.6 V, provided that they do not exceed the steady state level by more than 0.05 V. The possibility of relaxing the amount by which the overshoot may exceed the steady state level is under study. Note 5 - For the purpose of these masks, the rise time and decay time should be measured between -0.4 V and 0.4 V, and should not exceed 2 ns. Note 6 - The inverse pulse will have the same characteristics, noting that the timing tolerance at the zero level of the negative and positive transitions are +0.1 ns and +0.5 ns respectively. Annex A (to Recommendation G.703) Definition of codes This annex defines the Modified Alternate Mark Inversion Codes (cf. Recommendation G.701, item 9005) whose use is specified in Recommendation G.703. In these codes, binary 1 bits are generally represented by alternate positive and negative pulses, and binary 0 bits by spaces. Exceptions, as specified for the individual codes, are made when strings of successive 0 bits occur in the binary signal. In the definitions below, B represents an inserted pulse conforming to the AMI rule (G.701, 9004), and V represents an AMI violation (9007). The encoding of binary signals in accordance with the rules given in this annex includes frame alignment bits, etc. Definition of B3ZS (also designated HDB2) and HDB3 Each block of 3 (resp. 4) successive zeros is replaced by OOV (OOOV) or BOV (BOOV). The choice of OOV (resp. OOOV) or BOV (resp. BOOV) is made so that the number of B pulses between consecutive V pulses is odd. In other words, successive V pulses are of alternate polarity so that no d.c. component is introduced. Note - The abbreviations stand for the following: HDB2 (HDB3) high density bipolar of order 2 (3) B3ZS bipolar with three-zero substitution Definition of B6ZS and B8ZS Each block of 6 (resp. 8) successive zeros is replaced by OVBOVB (resp. OOOVBOVB). Annex B (to Recommendation G.703) Specification of the overvoltage protection requirement The input and output ports should withstand without damage the following test: - 10 standard lightning impulses (1.2/50s) with a maximum amplitude of UVDC (5 negative and 5 positive impulses). For the definition of this impulse see Recommendation K.17 Reference 1 (IEC 60-2/1973); - at the interface for coaxial pairs; - differential mode: with a pulse generator of Figure 1, the value of U is under study; - common mode - under study; - at the interface for symmetrical pairs: - differential mode: with a pulse generator of Figure 1, the value of U is under study (a value of 20 V has been mentioned); - common mode: with a pulse generator of Figure 2, U = 100 VDC; - possible pulse generators are described in Figures 1 and 2.